PIC18F67J60-I/PT

Product Summary

The PIC18F67J60-I/PT is a 64-Pin High-Performance, 1-Mbit Flash Microcontroller with Ethernet.

Parametrics

PIC18F67J60-I/PT absolute maximum ratings: (1)Ambient temperature under bias: -40 to +100℃; (2)Storage temperature: -65 to +150℃; (3)Voltage on any digital only input pin or MCLR with respect to VSS (except VDD): -0.3V to 6.0V; (4)Voltage on any combined digital and analog pin with respect to VSS: -0.3V to (VDD + 0.3V); (5)Voltage on VDDCORE with respect to VSS: -0.3V to 2.75V; (6)Voltage on VDD with respect to VSS: -0.3V to 4.0V; (7)Total power dissipation: 1.0W; (8)Maximum current out of VSS pin: 300 mA; (9)Maximum current into VDD pin: 250 mA; (10)Input clamp current, IIK (VI < 0 or VI > VDD): ±0mA; (11)Output clamp current, IOK (VO < 0 or VO > VDD): ±0mA; (12)Maximum output current sunk by any PORTB and PORTC I/O pins: 25 mA; (13)Maximum output current sunk by any PORTD, PORTE and PORTJ I/O pins: 8 mA; (14)Maximum output current sunk by any PORTA, PORTF, PORTG and PORTH I/O pins: 2 mA; (15)Maximum output current sourced by any PORTB and PORTC I/O pins: 25 mA; (16)Maximum output current sourced by any PORTD, PORTE and PORTJ I/O pins: 8 mA; (17)Maximum output current sourced by any PORTA, PORTF, PORTG and PORTH I/O pins: 2 mA; (18)Maximum current sunk by all ports combined: 200 mA; (19)Maximum current sourced by all ports combined: 200 mA.

Features

PIC18F67J60-I/PT features: (1)IEEE 802.3 Compatible Ethernet Controller; (2)Fully Compatible with 10/100/1000Base-T Networks; (3)Integrated MAC and 10Base-T PHY; (4)8-Kbyte Transmit/Receive Packet Buffer SRAM; (5)Supports One 10Base-T Port; (6)Programmable Automatic Retransmit on Collision; (7)Programmable Padding and CRC Generation; (8)Programmable Automatic Rejection of Erroneous Packets; (9)Activity Outputs for 2 LED Indicators; (10)High-Current Sink/Source: 25 mA/25 mA on PORTB and PORTC; (11)Five Timer modules (Timer0 to Timer4); (12)Four External Interrupt pins; (13)Two Capture/Compare/PWM (CCP) modules; (14)Selectable System Clock derived from Single 25 MHz External Source: 2.778 to 41.667 MHz; (15)Internal 31 kHz Oscillator; (16)Secondary Oscillator using Timer1 @ 32 kHz; (17)Fail-Safe Clock Monitor: Allows for safe shutdown if oscillator stops; (18)Two-Speed Oscillator Start-up.

Diagrams